Section: Hardware Interfacing Experiments
Aim: To design a traffic light controller using the 8085 microprocessor through the Programmable Peripheral Interface 8255.
Apparatus Required: 8085 µp kit, 8255 Interface board, DC regulated power supply, VXT parallel bus, Traffic light controller interface board.
Algorithm:
- Start.
- Write the control word to initialize the 8255 IC. Obtain the signal data for each direction and store it in memory.
- Initialize a counter to indicate the number of directions.
- Initialize the HL pair to the starting address of the data.
- Send the control/status data to the ports.
- Call a delay subroutine between signal switching.
- Decrement the counter and repeat the process for all directions.
Program:
| Address | Label | Mnemonics | Operand | Comment |
|---|---|---|---|---|
| 4100 | LXI | H, Data | Load the data starting address in HL register pair | |
| 4103 | MVI | C, 04 | Move 04 to C register for 4 directions | |
| 4105 | MOV | A, M | Move control word to Accumulator | |
| 4106 | OUT | CNT | Send control word to control register | |
| 4108 | INX | H | Increment HL pair | |
| 4109 | LOOP1 | MOV | A, M | Move Port C signal data to Accumulator |
| 410A | OUT | CPRT | Send status word to Port C | |
| 410C | INX | H | Increment HL pair | |
| 410D | MOV | A, M | Move Port B signal data to Accumulator | |
| 410E | OUT | BPRT | Send status word to Port B | |
| 4110 | INX | H | Increment HL pair | |
| 4111 | MOV | A, M | Move Port A signal data to Accumulator | |
| 4112 | OUT | APRT | Send status word to Port A | |
| 4114 | CALL | DELAY | Call delay subroutine | |
| 4117 | INX | H | Increment HL pair | |
| 4118 | DCR | C | Decrement direction counter C | |
| 4119 | JNZ | LOOP1 | Jump to LOOP1 if counter is non-zero | |
| 411C | JMP | START | Repeat traffic cycle | |
| 411F | DELAY | PUSH | B | Push BC register pair onto stack |
| 4120 | MVI | C, 0D | Move 0D to C register | |
| 4122 | LOOP3 | LXI | D, FFFFH | Load DE pair with FFFFH |
| 4125 | LOOP2 | DCX | D | Decrement DE pair |
| 4126 | MOV | A, D | Copy D to Accumulator | |
| 4127 | ORA | E | OR Accumulator with E | |
| 4128 | JNZ | LOOP2 | Loop until DE becomes 0 | |
| 412C | JNZ | LOOP3 | Loop until C becomes 0 | |
| 412F | POP | B | Pop BC pair from stack | |
| 4130 | RET | Return to main program |
Observation:
- Mode 0 (Simple I/O) control word is sent to initialize Ports A, B, and C as output ports.
- Output signals are sent sequentially to Port A, Port B, and Port C to illuminate Red, Yellow, and Green LEDs for four traffic directions with designated delay intervals.
Result: Thus the design of traffic light controller using 8085 microprocessor through programmable peripheral interface 8255 is done and the output is verified.
Flowchart:
+-------------------+
| START |
+---------+---------+
|
v
+-------------------+
| Initialize 8255 |
| Write Control Word|
+---------+---------+
|
v
+-------------------+
| Load Data Pointer |
| [HL] <- Data |
+---------+---------+
|
v
+-------------------+
| [C] <- 04H |
| (4 Directions) |
+---------+---------+
|
v <-------------------+
+-------------------+ |
| Output Signals to | |
| Ports C, B, and A | |
+---------+---------+ |
| |
v |
+-------------------+ |
| Call Delay | |
| Subroutine | |
+---------+---------+ |
| |
v |
+-------------------+ |
| [C] <- [C] - 1 | |
+---------+---------+ |
| |
v |
/ \ |
/ Is \ |
/ [C] = 0? \ |
< > |
\ Is zero? / --- NO -------+
\ /
\ /
| YES
v
+-------------------+
| Jump to START |
| (Continuous Loop) |
+-------------------+
Viva Questions:
- When the 8255 is reset, its I/O ports are all initialized as what?
- If the programmable counter timer 8254 is set in mode 1 and is to be used to count six events, the output will remain at logic 0 for how many number of counts?
- The devices that provide the means for a computer to communicate with the user or other computers are referred to as what?
- What is the maximum number of I/O devices which can be interfaced in the memory-mapped I/O technique?
- Interaction between a CPU and a peripheral device that takes place during an input/output operation is known as what?
- What is the other name for Programmable Peripheral Input-Output port?
- All the functions of the ports of 8255 are achieved by programming the bits of an internal register called what?
- What is the port that is used for the generation of handshake lines in Mode 1 or Mode 2?
- What is the pin that clears the control word register of 8255 when enabled?
- In 8255, if A1 = 0 and A0 = 1, then from where is the input read cycle performed?
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